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Electronic Volume Controller IC
PT2257
DESCRIPTION
PT2257 is an Electronic Volume Controller IC utilizing CMOS Technology specially designed for the new generation of AV entertainment products. It has two (2) built-in channels making it ideally suitable for mono and stereo sound applications. PT2257 provides an I2C Control Interface, an attenuation range of 0 to -79dB, low noise, and high channel separation. It is housed in an 8 pins, DIP or SOP Package, PT2257's pin assignments and application circuit are optimized for easy PCB layout and cost saving advantages.
FEATURES
* * * * * * * * CMOS Technology Low Power Consumption Least External Components Attenuation Range: 0 to -79dB at 1dB/step Operating Voltage: 4 to 9V Low Noise, S/N Ratio>100dB (A-weighting) Two Channel Output Available in 8 pins, DIP or SOP
APPLICATIONS
* * * * * AV Surround Audio Equipment Car Audio Mini Compo Computer Multi-Media Speaker Other Audio Equipment
PT2257 V1.3
-1-
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
PT2257
BLOCK DIAGRAM
V DD LIN
1 0 d B /S t e p 1 d B /S te p
+ + R ef
LO UT
1 0 d B /S t e p
+
1 d B /S te p
R OU T
R IN C ontrol unit S DA S CL
V ss
PT2257 V1.3
-2-
December, 2006
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Electronic Volume Controller IC
PT2257
PIN CONFIGURATION
LIN LOUT VS S SDA PT 2257 RIN ROUT VDD SCL
PIN DESCRIPTION
Pin Name LIN LOUT VSS SDA SCL VDD ROUT RIN I/O I O I I O I Description Left Input Channel Connect a Capacitor to Audio Source Left Output Channel Connect a Capacitor to Audio Output Ground I2C Data Input I2C Clock Input Power Supply Right Output Channel Connect a Capacitor to Audio Output Right Input Channel Connect a Capacitor to Audio Source Pin No. 1 2 3 4 5 6 7 8
PT2257 V1.3
-3-
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
PT2257
FUNCTION DESCRIPTION
BUS INTERFACE
Data are transmitted to and from the microprocessor to the PT2257 via the SDA and SCL. The SDA and SCL make up the BUS Interface. It should be noted that the pull-up resistors must be connected to the positive supply voltage.
DATA VALIDITY
A data on the SDA Line is considered valid and stable only when the SCL Signal is in HIGH State. The HIGH and LOW States of the SDA Line can only change when the SCL signal is LOW. Please refer to the figure below.
D ATA
CLK D a t a Lin e S ta b le , D a t a Va lid D a ta C h a ng e A llo w e d
START AND STOP CONDITIONS
A Start Condition is activated when 1. the SCL is set to HIGH and 2. SDA shifts from HIGH to LOW State. The Stop Condition is activated when 1. SCL is set to HIGH and 2. SDA shifts from LOW to HIGH State. Please refer to the timing diagram below.
CLK
DATA
Start
Stop
PT2257 V1.3
-4-
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
PT2257
BYTE FORMAT
Every byte transmitted to the SDA Line consists of 8 bits. Each byte must be followed by an Acknowledge Bit. The MSB is transmitted first.
ACKNOWLEDGE
During the Acknowledge Clock Pulse, the master (P) puts a resistive HIGH level on the SDA Line. The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during the Acknowledge Clock Pulse so that the SDA Line is in a Stable Low State during this Clock Pulse. Please refer to the diagram below.
SC L 1 2 3 4 7 8 9
SD A Start
MSB A cknowledgment from R eceiver
The audio processor that has been addressed has to generate an Acknowledge after receiving each byte; otherwise, the SDA Line will remain at the High Level during the ninth (9th) Clock Pulse. In this case, the master transmitter can generate the STOP Information in order to abort the transfer.
TRANSMISSION WITHOUT ACKNOWLEDGE
If you want to avoid the acknowledge detection of the audio processor, a simpler P transmission may be used. Wait one clock and do not check the slave acknowledge of this same clock then send the new data. If you use this approach, there are greater chances of faulty operation as well as decrease in noise immunity.
PT2257 V1.3
-5-
December, 2006
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Electronic Volume Controller IC
PT2257
INTERFACE PROTOCOL
The interface protocol consists of the following: * * * * * A Start bit A Chip Address Byte=88H ACK=Acknowledge bit A Data byte A Stop bit
Please refer to the diagram below: PT2257 Address
MSB First Byte LSB MSB LSB MSB LSB
START
1 0 0 0 1 0 0 0 ACK
DATA
ACK
DATA
ACK
STOP
DATA TRANSMITTED (N-BYTES+ACKNOWLEDGE)
Note: 1. ACK=ACKNOWLEDGE 2. MAX. CLOCK SPEED=100K BITS/S
PT2257 V1.3
-6-
December, 2006
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Electronic Volume Controller IC
PT2257
SOFTWARE SPECIFICATION
PT2257 ADDRESS
PT2257 Address is shown below: 1 MSB 0 0 0 1 0 0 0 LSB
I2C BUS INTERFACE START TIME
After Power is turned ON, PT2257 needs to wait for a short time in order to insure stability. The waiting time period for PT2257 to send I2C Bus Signal is at least 200ms. If the waiting time period is less than 200ms, I2C Control may fail. Please refer to the diagram below.
V
POWER ON
90% VDD
VDD At least 200ms
SDA/SCL
PT2257 V1.3
-7-
December, 2006
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Electronic Volume Controller IC
PT2257
DATA BYTES DESCRIPTION
FUNCTION BITS
MSB 1 1 1 1 1 0 0 0 2 1 1 1 0 0 0 0 1 3 1 0 1 1 1 1 1 1 4 1 1 0 0 1 0 1 1 5 1 A3 0 A3 0 A3 0 1 6 1 A2 B2 A2 B2 A2 B2 0 7 1 A1 B1 A1 B1 A1 B1 0 LSB 1 A0 B0 A0 B0 A0 B0 M Function Function OFF (-79dB) 2-Channel, -1dB/step 2-Channel, -10dB/step Left Channel, -1dB/step Left Channel, -10dB/step Right Channel, -1dB/step Right Channel, -10dB/step 2-Channel, MUTE When M=1, MUTE=ON When M=0, MUTE=OFF
ATTENUATION UNIT BIT
A3 0 0 0 0 0 0 0 0 1 1 A2/B2 0 0 0 0 1 1 1 1 0 0 A1/B1 0 0 1 1 0 0 1 1 0 0 A0/B0 0 1 0 1 0 1 0 1 0 1 Attenuation Value (dB) 0/0 -1/-10 -2/-20 -3/-30 -4/-40 -5/-50 -6/-60 -7/-70 -8/ -9/
Where: Ax=-dB/step, Bx=-10dB/step For example, for a Left Channel Attenuation at -33dB, the data byte is as follows: START 1 0 1 1 0 0 1 1 ACK 1 0 1 0 0 0 1 Left Channel -30dB Left Channel -3dB
1
ACK STOP
PT2257 V1.3
-8-
December, 2006
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Electronic Volume Controller IC
PT2257
ABSOLUTE MAXIMUM RATING
Parameter Supply Voltage Operating Temperature Storage Temperature Input Voltage Symbol VCC Topr Tstg VI Rating 12 -40 to +85 -65 to +150 -0.3 to VCC+0.3 Unit V V
AUDIO SECTION ELECTRICAL CHARACTERISTICS
Parameter Operating Voltage Operating Current Volume Attenuation Range Attenuation Step Attenuation Step Gain Error Interchannel Attenuation Gain Error Maximum Output Voltage Symbol VCC ICC ARANGE ASTEP GERR CERR Vomax Condition VCC=9V, VI=0V Minimum Attenuation Maximum Attenuation Min. 4 Typ. 9 9 0 -79 1 0.5 0.5 Max. 10 15 Unit V mA dB dB dB dB
Total Harmonic Distortion
THD
Noise Output Signal-to-Noise Ratio Channel Separation Mute Attenuation Frequency Response Input Impedance Output Impedance
No SNR CS MUTE FR Rin Rout
VCC=9V, f=1KHz Volume Att=0dB Rload=50K, 2.0 2.3 2.5 Vrms THD<1% f=1KHz, Vout=2Vrms 0.07 0.09 Volume % Att=0dB, Vout=200m A-weighted 0.003 0.005 Vrms Rload=50K Vin=GND, MUTE=OFF Volume Att=0dB 2 3 Vrms A-weighted 0dB=1Vrms, No-weighted 95 100 103 dB ATT=0dB, A-weighted 110 120 125 A-weighted Vin=2.5Vrms, f=1KHz 100 120 125 dB Volume Att=0dB Vin=2.5Vrms, f=1KHz 90 95 97 dB Volume Att=0dB, A-weighted Vin=1Vrms, 1 1.3 MHz Volume Att=-10dB f=1KHz 18 20 K f=1KHz, Vout=100m Vrms 100
PT2257 V1.3
-9-
December, 2006
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Electronic Volume Controller IC
PT2257
I2C BUS SECTION ELECTRICAL CHARACTERISTICS
Parameter Bus High Input Level Bus Low Input Level Symbol VIH VIL Condition Min. 0.5 Typ. Max. 0.2 Unit VCC VCC
BUS LINE TIMING CHARACTERISTICS
Parameter Symbol Condition Low Level Input Voltage VIL VDD=4.0V High level Input Voltage VIH VDD=4.0V SCL Clock Frequency fSCL Time the bus must be free before a tBUF new transmission can start Hold Time Start Condition* tHD-STA Clock Low Period tLOW Clock High Period tHIGH Setup Time for Start Condition ** tSU-STA Data Hold Time tHD-DAT Data Setup Time tSU-DAT Rise Time (SDA & SCL Lines) tR Fall Time (SDA & SCL Lines) tF Stop Condition Setup Time tSU-STO Notes: 1. * = The first clock pulse is generated after this period. 2. ** = This is only relevant for a repeated start condition.
Min. -0.5 1.6 0 5.0 4.0 5.0 4.0 5.0 0 250 4.0
Max. 1.1 4.0 100 1000 300 -
Unit V V KHz s s s s s s ns ns ns s
PT2257 V1.3
- 10 -
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
PT2257
PT2257 THD - FAST FOURIER TRANSFORM (FFT) ANALYSIS 1
(Conditions: Rload=10K, Volume Att=0dB, VCC=9V, Output Level=1Vrms)
+0 -20 -40
dB
-60 -80 -100 -120 -140 -160 20 50 100 200 500 Hz 1k 2k 5k 10k
PT2257 THD - FAST FOURIER TRANSFORM (FFT) ANALYSIS 2
(Conditions: Rload=10K, Volume Att=0dB, VCC=9V, Output Level=200m Vrms)
+0 -20 -40
dB
-60 -80 -100 -120 -140 -160 20 50 100 200 500 Hz 1k 2k 5k 10k
PT2257 V1.3
- 11 -
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
(Conditions: Rload=10K, Volume Att=0dB, VCC=9V, Vin=GND)
+0 -20 -40
PT2257
PT2257 NOISE FLOOR-FAST FOURIER TRANSFORM (FFT) ANALYSIS 3
dB
-60 -80 -100 -120 -140 -160 20
50
100
200
500 Hz
1k
2k
5k
10k
PT2257 THD VS. OUTPUT LEVEL
(Conditions: Rload=10K, Volume Att=0dB, VCC=9V, f=1KHz, A-weighted)
20 5 1
%
0.1 0.01 0.001 1m
2m
5m
10m
20m
50m Vrms
100m
200m
500m
1
2
4
PT2257 V1.3
- 12 -
December, 2006
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Electronic Volume Controller IC
PT2257
PT2257 THD VS FREQUENCY RESPONSE AT VARIOUS OUTPUT LEVELS
(Conditions: Rload=10K, Volume Att=0dB, No-weighted) Vout=2.5 Vrms
1
%
0.1 0.01
Vout=1Vrms
0.001 20
Vout=200m Vrms
50
100
200
500 Hz
1k
2k
5k
10k
20k
Note: From top to bottom: Vout=2.5Vrms, 1Vrms, 200mVrms
PT2257 INTERCHANNEL CROSSTALK
(Conditions: Rload=10K, Volume Att=0dB)
+0 -50 -100 -150 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
dB
PT2257 V1.3
- 13 -
December, 2006
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Electronic Volume Controller IC
PT2257
APPLICATION CIRCUIT
10 f
+ +
IN-L OUT-L
10 f
1 2 3 4
LIN LOUT VSS SDA
RIN 8 ROUT
7
+ +
10 f 10 f
IN-R OUT-R 4V-9V DC
VDD 6 SCL
5
0.1 f
+
47 f
PT2257 I 2C Bus
MCU
PT2257 V1.3
- 14 -
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
PT2257
ORDER INFORMATION
Valid Part Number PT2257 PT2257-S PT2257 (L) PT2257-S (L) Package Type 8 Pins, DIP, 300mil 8 Pins, SOP, 150mil 8 Pins, DIP, 300mil 8 Pins, SOP, 150mil Top Code PT2257 PT2257-S PT2257 PT2257-S
Notes: 1. (L), (C) or (S) = Lead Free. 2. The Lead Free mark is put in front of the date code.
PT2257 V1.3
- 15 -
December, 2006
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Electronic Volume Controller IC
PT2257
PACKAGE INFORMATION
8 PINS, DIP, 300MIL
PT2257 V1.3
- 16 -
December, 2006
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Electronic Volume Controller IC
Symbol A A1 A2 b b1 b2 b3 c c1 D D1 E E1 e eA eB eC L Min. 0.015 0.115 0.014 0.014 0.045 0.030 0.008 0.008 0.355 0.005 0.300 0.240 0.000 0.115 Nom. 0.130 0.018 0.018 0.060 0.039 0.010 0.010 0.365 0.310 0.250 0.100 BSC 0.300 BSC. 0.130 Max. 0.210 0.195 0.022 0.020 0.070 0.045 0.014 0.011 0.400 0.325 0.280 0.430 0.060 0.150
PT2257
Notes: 1. Controlling Dimension: INCHES. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Symbols are defined in the "MO Series Symbol LIST" in Section 2.2 of Publication No.95. 4. Dimensions A, A1 and L are measured with the package seated in JEDEC Seating Plane Gauge GS-3. 5. D, D1 and E1 dimension do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch. 6. E and eA measured with the leads constrained to be perpendicular to data -C- . 7. eB and eC are measured at the lead tips with the leads unconstrained. 8. N is the number of leads (N=8). 9. Pointed or rounded lead tips are preferred to ease insertion. 10. b2 and b3 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 (0.25mm). 11. Variation BA has a b3 dimension and is 1/2 lead package. 12. Distance between the leads including dambar protrusions to be 0.005 inch minimum. 13. Datum plane -H- coincident with the bottom of lead where lead exits the body. 14. Refer to JEDEC MS-001 variation BA. JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT2257 V1.3
- 17 -
December, 2006
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Electronic Volume Controller IC
PT2257
8 PINS, SOP, 150MIL
PT2257 V1.3
- 18 -
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
PT2257
PT2257 V1.3
- 19 -
December, 2006
Tel: 886-2-66296288 Fax: 886-2-29174598 URL: http://www.princeton.com.tw
Electronic Volume Controller IC
Symbol A A1 A2 b b1 c c1 D E E1 e L L1 L2 R R1 h 1 2 Min. 1.35 0.10 1.25 0.31 0.28 0.17 0.17 Typ. 4.90 BSC. 6.00 BSC. 3.90 BSC. 1.27 BSC. 1.04 REF. 0.25 BSC. Max. 1.75 0.25 1.65 0.51 0.48 0.25 0.23
PT2257
0.40 0.07 0.07 0.25 0 5 0
1.27 0.50 8 15 -
Notes: 1. Dimensioning and tolerancing per ANSI Y 14.5M-1994 2. Controlling Dimension: MILLIMETERS. 3. Dimension D does not include mold flash protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm (0.006 in) per end. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. D and E1 dimensions are determined at datum H. 4. The package top may be smaller than the package bottom. Dimensions D and E1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 5. Datums A & B to be determined at datum H. 6. N is the number of terminal positions. (N=8) 7. The dimensions apply to the flat section of the lead between 0.10 to 0.25mm from the lead tip. 8. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.10mm total in excess of the "b" dimension at maximum material condition. The dambar cannot be located on the lower radius of the foot. 9. This chamfer feature is optional. If it is not present, then a pin 1 identifier must be located within the index area indicated. 10. Refer to JEDEC MS-012, Variation AA. JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT2257 V1.3 - 20 December, 2006

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